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| Order this document by MC13282A/D Advance Information 100 MHz Video Processor with OSD Interface The MC13282A is a three channel wideband amplifier designed for use as a video pre-amp in high resolution RGB color monitors. Features: MC13282A 100 MHz VIDEO PROCESSOR WITH OSD INTERFACE SEMICONDUCTOR TECHNICAL DATA * * * * * * * * 4.0 Vpp Output with 100 MHz Bandwidth 3.5 ns Rise/Fall Time Subcontrast Control for Each Channel Blanking and Clamping Inputs Contrast Control OSD Interface with 50 MHz Bandwidth OSD Contrast Control Package: NDIP-24 24 ABSOLUTE MAXIMUM RATINGS Rating Power Supply Voltage - VCC Power Supply Voltage - Video VCC Voltage at Video Amplifier Inputs Collector-Emitter Current (Three Channels) Storage Temperature Junction Temperature Pin 9 17 2, 4, 6, 8, 10, 12 17 - - Value -0.5, 10 -0.5, 10 -0.5, +5.0 120 -65 to +150 150 Unit Vdc Vdc Vdc mA C C 1 P SUFFIX PLASTIC PACKAGE CASE 724 PIN CONNECTIONS R Subcontrast 1 R Input 2 G Subcontrast 3 G Input 4 B Subcontrast 5 24 Blank 23 Clamp 22 R Emitter 21 R Clamp 20 V5 G Emitter NDIP-24 19 18 G Clamp 17 Video VCC 16 B Clamp 15 B Emitter 14 Fast Commutate 13 Contrast (Top View) NOTES: 1. Devices should not be operated at these limits. Refer to "Recommended Operating Conditions" section for actual device operation. 2. ESD data available upon request. RECOMMENDED OPERATING CONDITIONS Characteristic Power Supply Voltage Contrast Control Subcontrast Control Blanking Input Signal Amplitude Clamping Input Signal Amplitude Video Signal Amplitude (with 75 Termination) OSD Signal Input Collector-Emitter Current (Total for Three Channels) Clamping Pulse Width Operating Ambient Temperature Pin 9, 17 13 1, 3, 5 24 23 2, 4, 6 8, 10, 12 17 23 - Min 7.6 0 0 0 0 - - 0 500 0 Typ 8.0 - - - - 0.7 TTL - - - Max 8.4 5.0 5.0 5.0 5.0 1.0 - 50 - 70 Unit Vdc Vdc Vdc V V Vpp V mA ns C B Input 6 Gnd 7 ROSD 8 VCC 9 GOSD 10 OSD Contrast 11 BOSD 12 ORDERING INFORMATION Device MC13282AP Operating Temperature Range TA = 0 to +70C Package Plastic DIP This document contains information on a new product. Specifications and information herein are subject to change without notice. DEVICE DATA MOTOROLA ANALOG IC (c) Motorola, Inc. 1996 Rev 0 1 MC13282A ELECTRICAL CHARACTERISTICS (Refer to Test Circuit Figure 1, TA = 25C, VCC = 8.0 Vdc.) Characteristic Input Impedance Internal DC Bias Voltage Output Signal Amplitude Voltage Gain Contrast Control Subcontrast Control Emitter DC Level Blanking Input Threshold Clamping Input Threshold Video Rise Time Video Fall Time Video Bandwidth V2, V4, V6 = 0.7 Vpp V1, V3 V5 V1 V3, V5, V13 = 5.0 V 50 V14 = 0 V V13 = 5.0 to 0 V V1, V3, V5 = 5.0 V V1, V3, V5 = 5.0 to 0 V V13 = 5.0 V - - - V2, V4, V6 = 0.7 Vpp 4.0 Vout = 4 0 Vpp RL > 300 , CL < 5.0 pF V2, V4, V6 = 0.7 Vpp V1, V3, V5, V13 = 5.0 V V14 = 0 V RL > 300 , CL < 5.0 pF V8, V10, V12 = TTL Level V11 = 5.0 V, V14 = 5.0 V 50V 50 V8, V10, V12 = TTL Level V11 = 5.0 V, V14 = 5.0 V - VCC, Video VCC = 8.0 V 15, 19, 22 Condition - Pin 2, 4, 6 Min 100 - 3.6 - 13 1, 3, 5 15, 19, 22 24 23 15, 19, 22 - - 1.0 - - - - 15, 19, 22 - Typ - 2.4 4.0 5.6 -26 -26 1.2 1.25 3.75 3.5 3.5 100 Max - - - - - - 1.4 - - - - - MHz Unit k Vdc Vpp V/V dB dB Vdc V V ns OSD Rise Time OSD Fall Time OSD Bandwidth OSD Propagation Delay Power Supply Current NOTE: 15, 19, 22 - - 7.0 7.0 50 17 70 - - - - - ns 15, 19, 22 - 9, 17 - - - MHz ns mA It is recommended to use a double sided PCB layout for high frequency measurement (e.g., rise/fall time, bandwidth). 2 MOTOROLA ANALOG IC DEVICE DATA MC13282A Figure 1. Internal Block Diagram R Clamp 21 Vref1 Vref2 Fast Commutate 14 Video VCC 17 R Input 2 ROSD 8 R Emitter 22 R Subcontrast 1 Contrast 13 Contrast and Subcontrast Control Processor R Channel G Clamp 18 Vref1 Vref2 G Input 4 GOSD 10 Clamp Blank Decoder G Subcontrast 3 Contrast and Subcontrast Control Processor G Emitter 19 Blank 24 Clamp 23 G Channel B Clamp 16 OSD Contrast 11 Vref1 Vref2 B Input 6 BOSD 12 B Channel B Subcontrast 5 Contrast and Subcontrast Control Processor B Emitter 15 VCC 9 V5 20 Gnd 7 This device contains 272 active transistors. MOTOROLA ANALOG IC DEVICE DATA 3 MC13282A PIN FUNCTION DESCRIPTION Pin 1 Name R Subcontrast Control G Subcontrast Control B Subcontrast Control R Input Vref 4 G Input 0.1 75 6 B Input Cl Clamp 5.0 V The input coupling capacitor is used for input clamping storage. The maximum source impedance is 100 . I t l it f th id i li iti Input polarity of the video signal is positive. Nominal 0.7 Vpp input signal is recommended (maximum 1.0 Vpp). 10 k 1.0 10k Equivalent Internal Circuit VCC 50 k Description These pin provides a maximum of 26 dB attenuation to vary the gain of each video amplifier separately. Input voltage is from 0 to 5.0 V. Increasing the voltage will increase the contrast level. 3 5.0 V 5 2 7 8 Ground ROSD Input VCC Ground pin. Connect to a clean, solid ground. These inputs are standard TTL level. 10 GOSD Input 80 k 12 BOSD Input 60 k 9 11 VCC OSD Contrast Connect to 8.0 Vdc supply, 5%. Decoupling is required at this pin. VCC 3.5 k On Screen Display contrast control. Input voltage is from 0 to 5.0 V. Increasing the voltage will increase the contrast of the OSD signal. 5.0 V 13 Contrast 5.0 V 42 k 2.0 k 2.5 V Overall Contrast Control for the three channels. The input range is 0 V to 5.0 V. An increase of voltage increases the contrast. 4 MOTOROLA ANALOG IC DEVICE DATA MC13282A PIN FUNCTION DESCRIPTION (continued) Pin 14 Name Fast Commutate VCC Equivalent Internal Circuit Description This pin is used in conjunction with the RGB OSD inputs. It is a high speed switch used for overlaying text on picture. A logic low selects Pins 2, 4, 6. A logic high selects Pins 8, 10, 12. 40 k 20 k 15 B Emitter Output VCC Vid Video Signal Contrast RE = 330 Typical The video outputs are configured as emitter-followers with a driving capability of about 15 mA each. The dc voltage at these three emitters is set to 1.2 V (black level). The dc current through the output stage is determined by the emitter resistors (typically 330 ). 19 G Emitter Output 22 R Emitter Output 16 B Clamp Capacitor A 100 nF capacitor is connected to each of these pins. 1.2 V Video Out VCC The capacitor is used for video output dc restoration. 18 G Clamp Capacitor 21 R Clamp Capacitor Connect to 8.0 V dc supply, 5%. This VCC is for the video output stage. It is internally connected to the collectors of the output transistors. VCC Band Gap Regulator 5.0 V regulator. Minimum 10 F capacitor is required for noise filtering and compensation. It can source up to 20 mA but not sink current. Output impedance is 10 . Recommended for use as a voltage reference only. 17 Video VCC 20 5.0 Vref (V5) 5.0 V 10 F R 0.8 R MOTOROLA ANALOG IC DEVICE DATA 5 MC13282A PIN FUNCTION DESCRIPTION (continued) Pin 23 Name Clamp VCC Vref2 10 k 3.75 V Vref1 30 k Equivalent Internal Circuit Description This pin is used for video clamping. The threshold clamping level is 3.75 V. 24 Blank VCC Vref2 10 k 1.25 V Vref1 30 k This pin is used for video blanking. The threshold blanking level is 1.25 V. FUNCTIONAL DESCRIPTION The MC13282A is composed of three video amplifiers, clamping and blanking circuitry with contrast and subcontrast controls and OSD interface. Each video amplifier is designed to have a -3.0 dB bandwidth of 100 MHz with a gain of up to about 5.6 V/V, or 15 dB. Video Input The video input stages are high impedance and designed to accept a maximum signal of 1.0 Vpp with 75 termination (typically) provided externally. During the clamping period, a current is provided to the input capacitor by the clamping circuit which brings the input to a proper dc level (nominal 2.0 V). The blanking and clamping signals are to be provided externally, with their thresholds sitting at 1.25 V and 3.75 V, respectively. Video Output The video output stages are configured as emitter-followers, with a driving capability of about 15 mA for each channel. The dc voltage at these three emitters is set to 1.2 V (black level). The dc current through each output stage is determined by the emitter resistor (typically 330 ). Contrast Control The contrast control varies the gain of three video amplifiers from a minimum of 0.3 V/V to a maximum of 5.6 V/V when all subcontrast levels are set to 5.0 V. Subcontrast Control Each subcontrast control provides a maximum of 26 dB attenuation on each video amplifier separately. OSD Interface The three OSD inputs are TTL compatible and have a typical bandwidth of 50 MHz. A fast commutate pin is provided to select either the video or the OSD inputs as the source for the outputs. OSD contrast control is also provided to set the amount of gain required when OSD inputs are selected. Clamp Pulse Input The clamping pulse is provided externally, and the pulse width must be no less than 500 ns. Blank Pulse Input The blanking pulse is used to blank the video signal during the horizontal sync period, or used as a control pin for video mute function. Power Supplies VCC and Video VCC supplies are to be 8.0 V 5%. 6 MOTOROLA ANALOG IC DEVICE DATA MC13282A Figure 2. Test Circuit Blank Input 24 Blank C1 0.1 C2 0.1 C3 0.1 Clamp Input 23 Clamp OSD Select 14 Fast Commutate 8.0 V C14 47 F VCC R Output G Output B Output R5 330 R6 330 C15 0.1 17 Video VCC 9 R Input Video Inputs G Input B Input 2 4 6 R Input G Input B Input R Emitter G Emitter B Emitter 22 19 15 R4 330 8 OSD Inputs ROSD MC13282A R Clamp G Clamp B Clamp 21 18 16 C11 0.1 C12 0.1 C13 0.1 10 G OSD 12 7 Gnd 20 R1 75 R2 75 R3 75 V5 R C5 10 F 1 C6 0.1 5.0 V 5.0 V Subcontrast Control G 3 C7 0.1 5.0 V B 5 C8 0.1 5.0 V OSD Contrast 11 C9 0.1 BOSD Clamp Capacitor Contrast 13 C10 0.1 5.0 V C4 0.1 APPLICATION INFORMATION PCB Layout Care should be taken in the PCB layout to minimize the noise effects. The most sensitive pins are VCC (9), Video VCC (17), V5 (20), Clamp (16, 18, 21). It is strongly recommended to make a ground plane and connect VCC/Video VCC and ground traces to the power supply directly. Separate power supply traces, should be used for VCC and Video VCC and decoupling capacitors should be connected as close as possible to the device. Multi-layer ceramic and tantalum capacitors are recommended. Pin 20 (V5) is designed as a 5.0 V voltage reference for contrast, RGB subcontrast and OSD contrast controls, so the same precaution for VCC should be also applied at this pin. The Clamp capacitors at Pins 16,18 and 21 should be connected to ground close to IC's ground Pin 7 or power supply ground. The copper trace of the video signal inputs and outputs should be as short as possible and separated by ground traces to avoid any RGB cross-interference. A double sided PCB should be used to optimize the device's performance. RGB Input and Output The RGB output stages are designed as emitter-followers to drive the CRT driver circuitry directly. The emitter resistors used is 330 (typically) and the driving current is 15 mA MOTOROLA ANALOG IC DEVICE DATA maximum for each channel. The loading impedance connected to the output stages should be greater than 330 and less than 5.0 pF for optimum performance (e.g., rise/fall time, bandwidth, etc.). Decreasing the resistive load will reduce the rise/fall time by increasing the driving current, but the output stage may be damaged due to increasing power dissipation at the same time. The frequency response is affected by the loading capacitance. The typical value is 3.0 to 5.0 pF. Figure 4 shows a typical interface with a video output driver. For a high resolution color monitor application, it is recommended to use coaxial cable or shielded cable for input signal connections. Clamp and Blank Input The clamp input is normally (except for Sync-on-Green) connected to a positive horizontal sync pulse, and has a threshold level of 3.75 V. It is used as a timing reference for the dc restoration process, so it cannot be left open. If Sync-on-Green timing mode is used, the clamping pulse should be located at horizontal back porch period instead of horizontal sync tip. Otherwise, the black level will be clamped at an incorrect voltage. The blank input is used as a video mute, or horizontal blanking control, and is normally connected to a blanking 7 MC13282A pulse generated from the flyback or from an MCU. The threshold level of 1.25 V. The blanking pulse width should be equal to the flyback retrace period to make sure that the video signal is blanked properly during retrace. It is necessary to limit the amplitude, and avoid any negative undershoots if the flyback pulse is used. This Blanking input pin cannot accept a negative voltage. This pin should be grounded if it is not used. OSD interface Figure 3 show a typical application with an OSD device (MC141540). The MC141540 OSD and FC outputs are TTL compatible, and therefore interface directly with MC13282A. Level shifting circuitry is not needed. The MC141540 is a digital device, controlled by an MCU. Therefore, separate power supply runs to the MC141540 and to the MC13282A are recommended. Care should be taken in the PC board layout to prevent digital noise from entering the analog portions of MC13282A. Normally the OSD switching is done during the active video time. It is recommended that the Fast Commutate pin not be activated during the horizontal sync time. Figure 3. Interfacing with OSD Device 5.0 V 8.0 V R4 10 C11 C12 10 F 47 F VR1 50 k VR2 50 k VR3 50 k C10 0.1 C9 0.1 C7 47 F C8 0.1 R G B Contrast Contrast Contrast C1 0.1 R Input C2 0.1 G Input C3 0.1 B Input R1 75 R2 75 R3 75 Clamp Blank B Input G Input R Input V5 Gnd VCC Video VCC R Emitter G Emitter R5 330 R6 330 R7 330 RGB Output MC13282A Video Processor with OSD Interface B Emitter R Clamp G Clamp B Clamp Contrast C4 0.1 C5 0.1 Fast OSD ROSDGOSD BOSD Commutate Contrast 5.0 V Clamp Input Blank Input C6 0.1 5.0 V VR4 50 k VR5 50 k 5.0 V ROSD GOSD BOSD Fast H Tone Commutate VDD VSS SS MCU Interface MOSI SCK HF/B VF/B VDDA Hsyn Input Vsyn Input VCO RP MC141540 On Screen Display Processor C18 10 F C17 0.1 L1 150 mH 5.0 V VDDA VSSA C16 100 F C15 0.1 R9 R8 5.6 k 470 k C13 0.01 R10 2.0 k C14 0.1 R11 7.5 k 8 MOTOROLA ANALOG IC DEVICE DATA MC13282A Figure 4. Interfacing with Video Output Drivers CRT Driver VCC Reference Voltage CL 5.0 V 8.0 V R4 10 C11 C12 10 F 47 F VR1 50 k VR2 50 k VR3 50 k C10 0.1 C9 0.1 C7 47 F C8 0.1 R G B Contrast Contrast Contrast C1 0.1 R Input C2 0.1 G Input C3 0.1 B Input R1 75 R2 75 R3 75 Clamp Blank B Input G Input R Input V5 Gnd VCC Video VCC R Emitter G Emitter R5 330 R6 330 R7 330 RGB Output MC13282A Video Processor with OSD Interface B Emitter R Clamp G Clamp B Clamp Contrast C4 0.1 C5 0.1 Fast OSD ROSD GOSD BOSD Commutate Contrast C6 0.1 5.0 V Clamp Input Blank Input OSD Input and Control VR5 50 k MOTOROLA ANALOG IC DEVICE DATA 9 MC13282A Figure 5. RGB In/Out Linearity 4.5 4.0 VIDEO OUTPUT (Vpp) VIDEO OUTPUT (Vpp) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.2 0.4 VIDEO INPUT (Vpp) 0.6 0.8 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 2.0 4.0 6.0 Figure 6. Color Contrast CONTRAST CONTROL VOLTAGE (V) Figure 7. Subcontrast Control 4.5 4.0 VIDEO OUTPUT (Vpp) VIDEO OUTPUT (Vpp) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 2.0 4.0 6.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 Figure 8. OSD Contrast Control 2.0 4.0 6.0 SUBCONTRAST VOLTAGE (V) OSD CONTRAST CONTROL VOLTAGE (V) Figure 9. Crosstalk From Green to Red and Blue Channels 0 -10 ATTENUATION (dB) -20 -30 -40 -50 -60 -70 -80 1.0 10 Red Channel 100 1000 Blue Channel f, FREQUENCY (MHz) 10 MOTOROLA ANALOG IC DEVICE DATA MC13282A Figure 10. Rise Time Figure 11. Fall Time 100 mV/DIV 5.0 ns/DIV 10x PROBE 100 mV/DIV 5.0 ns/DIV 10x PROBE NOTE: Recommended to use a double sided PCB without any socket for rise/fall time measurements, using an input pulse with 1.5 ns rise/fall time and an active probe with 1.7 pF capacitance loading. Figure 12. Single Sided PCB Layout (Component Side) Blank Clamp R In G VR1 R1 G In C6 C1 C7 C2 R2 C8 C3 J1 J3 IC2 R6 C13 R5 C4 R5 C12 C17 C16 C11 R4 R3 C8 C10 J6 Gnd VCC 8.0 V R G B FC OSD In In VR4 VR5 OSD Main Contrast Contrast G Out G VR2 G VR3 R7 R Out J5 J2 B In C14 C15 J4 B Out NOTE: J = Jumper MOTOROLA ANALOG IC DEVICE DATA 11 MC13282A OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 724-03 ISSUE D -A- 24 1 13 -B- 12 NOTES: 1. CHAMFERED CONTOUR OPTIONAL. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 4. CONTROLLING DIMENSION: INCH. C -T- SEATING PLANE L K E G F D 24 PL NOTE 1 N J 24 PL M 0.25 (0.010) M M TB M 0.25 (0.010) TA M DIM A B C D E F G J K L M N INCHES MIN MAX 1.230 1.265 0.250 0.270 0.145 0.175 0.015 0.020 0.050 BSC 0.040 0.060 0.100 BSC 0.007 0.012 0.110 0.140 0.300 BSC 0_ 15_ 0.020 0.040 MILLIMETERS MIN MAX 31.25 32.13 6.35 6.85 3.69 4.44 0.38 0.51 1.27 BSC 1.02 1.52 2.54 BSC 0.18 0.30 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 12 *MC13282A/D* MOTOROLA ANALOG IC DEVICE DATA MC13282A/D |
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